1. Field of the Invention
The present invention is directed to the manufacture of masks used in the lithographic production of integrated circuits and, in particular, to the manufacture of phase shifting masks (PSMs).
2. Description of Related Art
As an alternative to chrome on glass (COG) masks used in the lithographic production of integrated circuits, alternating phase shifting masks (altPSMs) have been employed in order to increase the resolution of the critical active area patterns projected. Such increased resolution enables smaller line widths to be exposed on the resist and consequently etched into or deposited on the wafer substrate. The critical dimension (CD) of the system is the smallest dimension that the lithographic system can create on the resist layer by normal techniques, and altPSMs permit sub-CD widths to be exposed and created on the wafer. This is done by manipulating the electric field vector or phase of the energy beam, e.g., visible or ultraviolet light, used in the lithographic process. This phase variation is achieved in PSMs by modifying the length that a light beam travels through the mask material. By recessing the mask to an appropriate depth, light traversing the thinner portion of the mask and light traversing the thicker portion of the masks will be 180° out of phase, that is, their electric field vector will be of equal magnitude, but point in exactly the opposite direction, so that any interaction between these light beams results in perfect cancellation. However, since the recessed regions on the mask have to form closed polygons and not all edges of these polygons can be made to coincide with desired layout images, the light intensity decrease caused by these residual 180° phase steps leads to unwanted patterns on the wafer. These unwanted residual phase images are erased using a second exposure, commonly using a non-phase shifted trim or block mask.
One of the major challenges in generating an altPSM layout is to create manufacturable and lithographically viable phase shapes without introducing undue layout conflicts. Traditional phase shift design approaches start the design process by generating phase regions around critical segments of the design and then remove manufacturability violations by expanding narrow phase regions and filling narrow phase spaces. Since every expansion can lead to new spacing violations and every fill operation can lead to new width violations, phase shape legalization has to be done iteratively.
A typical prior art iterative legalization/cleanup method for creating an altPSM mask design is shown in FIGS. 1-3. The goals of the prior art iterative legalization/cleanup are to remove all lithographic and manufacturability constraint violations, avoid phase assignment conflicts and keep the phase shapes as simple as possible. In a typical legalization methodology, if a spacing violation occurs, the cleanup step will modify the phase edge segment in violation by an incremental amount that is a fraction of the minimum width (Wmin) allowed by manufacturability constraints, e.g. ¼ of Wmin.
In FIG. 1, a desired layout 300 of circuit features 302, 304, 306 requires phase shifting shapes 312, 314, 316 to project portions of the features. In order to complete the design of the phase shifting shapes, the prior art iterative method identifies a region shown by arrow 320 that violates the minimum width rule dictated by mask manufacturability incrementally adds. To correct the rule violation, the prior art method adds phase shape portions 312a, 314a. However, since these portions still violate the minimum width rule vertically, and now also add a further minimum width violation horizontally, additional expansion is made by adding portions both below and to the side in several steps. The additional expansion is shown in FIG. 2, where further vertical and horizontal additions are shown as 312b, 312c, 314b and 314c. The horizontal expansion of phase shifting shape 314 has now resulted in an additional violation of the minimum space rule between the phase shifting shape and the adjacent feature 304, as shown by arrow 322. As shown in FIG. 3, additional iterations add horizontal extensions, e.g., portion 314d, and eventually correct the space violation as well as the minimum width violations.
For this particular example, six iterations are required to converge on a stable solution. In other cases, more iterations may be required, and some cases, there may be no convergence. This iterative cleanup is time consuming and error prone. It is impossible to predict the exact number of iterations required, and most CAD tools do not support looping.
One alternate prior art design approach is to design phase transitions rather than designing phase shapes. This was attempted previously in router based altPSM deisgns However, router-based altPSM designs have the disadvantage that they do not carry a preferred orientation of the phase transitions through the entire layout segment, and instead force closed loops. This detracts from good lithographic performance.
Therefore, there is a need to generate altPSM shapes that meet manufacturability and lithography requirements without lengthy and error prone iterative cleanup in small steps, while minimizing shape complexity and avoiding topological phase errors caused by overly aggressive phase shape cleanup. It would also be preferable to create layouts in which the primary or dominant orientation of the features are in the same direction to improve lithographic performance.